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A Quad 2 Input NAND Gate using CMOS technology and supplied in a 14 pin DIL package. All inputs and outputs are buffered.
The NAND gate takes in two inputs. When both Input A AND Input B are high the output will be NOT active.
 |
Input A | Input B | Output Z |
| 0 | 0 | 1 | |
| 0 | 1 | 1 | |
| 1 | 0 | 1 | |
| 1 | 1 | 0 |
| Attribute | Value |
|---|---|
| Operating Voltage | 3V to 15V. |
| Voltage on any pin | -0.5V to Operating Voltage +0.5V. |
| Maximum Low Input Voltage | 2.7V @ 9V operating Voltage. |
| Maximum Low Input Voltage | 3.3V @ 5V Operating Voltage. |
| Maximum Low Input Voltage | 3.6V @12V operating Voltage. |
| Ma |
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